Sync circuit is widely used in the field of integrated circuit (IC) design. Owe to sync circuit operated based on clock, it is thus readily to a circuit design engineer use EDA Tool as a auxiliary tool of circuit design so as to design and analyze the circuit.
Since the interface between flash memory and conventional, flash controller is typically asynchronies and the flash controllers may be sold to many flash memory chip (hereinafter called flash chip) supplier who may use the flash controllers to control the flash chips of which access time or parameters may different due to manufacturer are different or memory types or capacities are various, even they are produced by the same manufacturer. Consequently, a major rate bottleneck for a large capacity of flash disk package which use a flash controller to control flash chips, may often be determined by the aforementioned interface. Generally, flash chip at data bus has lower drive capability, and a flash disk is composed of a plurality of flash chips, thus the data bus loading is heavy. The rate of data access is thus restrained by the drive capability. To access data correctly from a large flash disk, a typical strategy is implemented by reducing the working frequency.
Due to the drive capability is usually a main rate bottleneck while accessing a flash disk, high access rate flash control is only using in those flash disk having small capacity, otherwise, to access high capacity, the working frequency has to be down so as to ensure access data correctly.
An object of the present invention is to overcome above problems.